Intel's Centrino CPU (Pentium-M): Revolutionizing the Mobile World
by Anand Lal Shimpi on March 12, 2003 6:10 AM EST- Posted in
- Laptops
Banias' Caches
We mentioned at last year's Fall IDF that Banias would be a 0.13-micron processor composed of no less than 77 million transistors. Almost half of the Banias die is reserved for cache and as you can expect, the cache is nothing normal.
Banias is outfitted with a 64KB L1 cache, twice the size of the L1 found on the Pentium III. The L1 is split into a 32KB data cache and a 32KB instruction cache; as we mentioned before, the gate-hungry trace cache was rejected as an option for a mobile CPU although it would have reduced branch mis-predict penalties.
What's most impressive about Banias' caches is its 1MB on-die L2 cache. Not only did the Israel design team carefully design the transistors that make up the gates within the cache to maximize power savings, but they also changed the way data is actually accessed within the cache. Banias employs an 8-way set associative L2 cache, and normally in such a cache when one of the "ways" is selected, the entire block is selected. With Banias, each "way" is further split into quadrants so that when one is selected, a separate multiplexer selects which quadrant the necessary data is located in and only activates that part of the cache. The end result is that much less of the power hungry L2 cache is consuming battery life, which helps extend that battery life significantly.
Out of all of the transistors in a CPU, those dedicated for cache are generally the most power hungry, and thus keeping them inactive as much as possible helps tremendously in reducing power consumption. Of course the downside to this approach is that cache accesses now take a little longer, but the power savings are significant enough to make up for the performance deficit by going to a larger cache - which is why Banias is able to have such a large cache and still be relatively low on the power consumption scale.
The higher latency of the cache is masked by the fact that a 1MB L2 cache improves overall system performance enough to hide the majority of the latency hit.
Facebook
Twitter
RSS
8 Comments
View All Comments
zigCorsair - Wednesday, July 14, 2004 - link
I thought it was a very informative article. Of course, I'll be upset if it's biased, but being a master's student in CS, many of the exact details I was looking for were in here, and for that I say thank you.Zebo - Monday, May 10, 2004 - link
I don't see whats so impressive. An athlon mobile 2600/2800 xp 35W version, which runs ~2000Mhz will kill these. To little to late.Anonymous User - Wednesday, September 10, 2003 - link
how the hell could this be a balanced and informative article when in their own analysis they ignored their own data?There is no mention of the anamolous nature of the BAPCO test..absolutely NOTHING...
Its enough for me to question the competency of this site...and even to the point where I suspect that certain unethical compromises have been made.
Anonymous User - Wednesday, September 10, 2003 - link
Yeah, I agree with Sprockkets... same reason Athlon XP loses to the P4 in this benchmark... someone was trying to make the P4 look better, and everything else look worse. Now all the sudden, this new great CPU is getting it's but kicked because of all the P4 optimizations (and probably non-P4 deoptomizations).sprockkets - Tuesday, September 9, 2003 - link
I wonder why the P4 trashes the PM on Content Creation Performance and nothing else? Maybe it's the stupid skewing toward the P4. Why else would it lose here and kick butt everywhere else? www.theinquirer.net has an article which brought this to readers attention.Anonymous User - Thursday, August 21, 2003 - link
"Without a trace cache, the design team was forced to develop a more accurate branch predictor unit for the Banias core. Although beyond the scope of this article, Banias was outfitted with a branch predictor significantly superior to what was in the Pentium III. The end result was a reduction of mispredicted branches by around 20%."Wouldn't he mean that the branch predictor was superior to the P4?
Anonymous User - Tuesday, August 19, 2003 - link
looks goodAnonymous User - Friday, August 8, 2003 - link
An outstanding well balanced article, after this read I feel I really know about Centrino. Thanks