AMD Revises Bulldozer Transistor Count: 1.2B, not 2B
by Anand Lal Shimpi on December 2, 2011 2:36 AM ESTThis is a bit unusual. I got an email from AMD PR this week asking me to correct the Bulldozer transistor count in our Sandy Bridge E review. The incorrect number, provided to me (and other reviewers) by AMD PR around 3 months ago was 2 billion transistors. The actual transistor count for Bulldozer is apparently 1.2 billion transistors. I don't have an explanation as to why the original number was wrong, just that the new number has been triple checked by my contact and is indeed right. The total die area for a 4-module/8-core Bulldozer remains correct at 315mm2.
| CPU Specification Comparison | ||||||||
| CPU | Manufacturing Process | Cores | Transistor Count | Die Size | ||||
| AMD Bulldozer 8C | 32nm | 8 |
1.2B |
315mm2 | ||||
| AMD Thuban 6C | 45nm | 6 | 904M | 346mm2 | ||||
| AMD Deneb 4C | 45nm | 4 | 758M | 258mm2 | ||||
| Intel Gulftown 6C | 32nm | 6 | 1.17B | 240mm2 | ||||
| Intel Sandy Bridge E (6C) | 32nm | 6 | 2.27B | 435mm2 | ||||
| Intel Nehalem/Bloomfield 4C | 45nm | 4 | 731M | 263mm2 | ||||
| Intel Sandy Bridge 4C | 32nm | 4 | 995M | 216mm2 | ||||
| Intel Lynnfield 4C | 45nm | 4 | 774M | 296mm2 | ||||
| Intel Clarkdale 2C | 32nm | 2 | 384M | 81mm2 | ||||
| Intel Sandy Bridge 2C (GT1) | 32nm | 2 | 504M | 131mm2 | ||||
| Intel Sandy Bridge 2C (GT2) | 32nm | 2 | 624M | 149mm2 | ||||
Despite the downward revision in Bulldozer's transistor count by 800M, AMD's first high-end 32nm processor still boasts a higher transistor density than any of its 45nm predecessors (as you'd expect):
Transistor density depends on more than just process technology. The design of the chip itself including details like the balance between logic, cache and IO transistors can have a major impact on how compact the die ends up being. Higher transistor densities are generally more desirable to a manufacturer (fewer defects per die, more die per wafer, lower costs), but from the end user's perspective the overall price/performance (and power?) ratio is what ultimately matters.
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jensend - Friday, December 2, 2011 - link
You wrote ~2B for bulldozer in the above table.When a media source publishes a correction that doesn't correct anything, do you call it an incorrection?
Anand Lal Shimpi - Friday, December 2, 2011 - link
ha! fixed :)jjj - Friday, December 2, 2011 - link
Next time you MUST count them yourself !DaFox - Friday, December 2, 2011 - link
I'd enjoy that.Paul Tarnowski - Friday, December 2, 2011 - link
I've been insisting on personally inspecting the Lithography of any CPU I buy in a store, just like I do any other thing like MB and graphics card. I figure if I push for it long enough, I might be able to get them to bring in an electron microscope.What? It could happen!
gerryka - Friday, December 2, 2011 - link
Maybe they just wanted to cover up the somewhat higher power consumption at launch with the fact that, of course it has to consume a bit more power, look, it's got nearly twice the transistor count of a Gulftown chip.tipoo - Friday, December 2, 2011 - link
Doubt it, saying we doubled the transistor count while barely edging out our own old part most of the time is hardly good for PR. This was either a confusion between the desktop and server/16 core chip, or a difference in how they count transistors because of the new automatic design method which produces far more useless transistors than manual creation would.CeriseCogburn - Monday, June 11, 2012 - link
No it "proved" their octocore was a "real" octocore and not a crippled quad with amd fake HT...Plus this very site went on about the efficiency, as did all the little amd power fan boys. I saw it myself.
So the liars at amd pr knew exactly what they were doing, and played the amd fan boys like a stradivarius.
CeriseCogburn - Monday, June 11, 2012 - link
Yes I only had to listen to the amd fan boys for over three months go on and on about how amd engineers could pack so many transistors in so little die speace, the efficiency being very excellent and "proved once again" they have the "best hardware".Just imagine how the PR mancheans giggled reading the fanboys blubbering on.
Then, since the performance was so suck, the amd fans went into a tirade on windows inefficiency and tin foil hat Intel and Microsoft conspiracy theories, then we saw the endless "scheduling issue" lie rear it's ugly head, and the windows patch, that did crap squiggly for it.
The PR liars did a wonderful job snowballing the fan base. They deserve a raise for the boldness and effectiveness of the massive duping they delivered all the EXPERTS...
Marc HFR - Friday, December 2, 2011 - link
At the International Solid-State Circuits Conference 2011, AMD told us that Module (Logic + L2) = 213 millions transistors8 MB L3 cache use at least 6 transistor / bit : 402 millions
It's 1.254 billions WITHOUT Hypertransport / DDR3 IO and Northbridge...