During a time of increased competitor activity, Intel has decided to disclose some of the high level details surrounding its next generation consumer processor, known as Rocket Lake or Intel’s 11th Gen Core. The new processor family is due in the market in the first quarter of 2021, and is expected to share a socket and motherboard compatibility with the current 10th Gen Comet Lake processors, providing an upgrade path even for those with a Core i9-10900K, Intel’s highest performing desktop processor to date. New 500-series motherboards are also expected to be available.

The new Rocket Lake-S silicon or SoC is going to be known as ‘Cypress Cove’. Intel confuses itself in the press release compared to the PDF presentation, as the press release dictates that this isn’t the core – it specifically states that the core microarchitecture is Ice Lake (Sunny Cove). However the presentation PDF says Cypress Cove is the core. In this instance, to be clear, Sunny Cove and Cypress Cove are set to be practically identical, however Sunny Cove is on 10nm and Cypress Cove is the back-ported variant on 14nm.

Paired with these cores will be the Tiger Lake graphics architecture, known as Xe-LP, which is also being backported from 10nm to 14nm for this product. The combined 14nm representation of Ice Lake cores and Xe-LP graphics is what is going to be known as Rocket Lake, (at least one of) the SoC(s) of the 11th Gen Core family.

With the new processors, Intel is targeting a raw instruction-per-clock uplift in the double digit range, which would be similar to the uplift we saw moving from Comet Lake to Intel’s Ice Lake mobile processors. Because of the node difference, the exact IPC change is likely to be lower than what we’ve seen before, but 10%+ is still highly respectable, especially if Intel is also able to maintain the high frequency it has achieved with the current generation of Comet Lake.

One of the benefits of moving to a back-ported Sunny Cove core will be the inclusion of the AVX-512 vector acceleration unit in Cypress Cove. This enables Intel to enable its library of Deep Learning Boost technologies for AI and ML acceleration, including support for Vector Neural Network Instructions (VNNI), finally bringing AVX-512 to the desktop platform.

However, to mix and match the right combination of core count, graphics, and AVX-512 for die size/yield/cost, it appears that Rocket Lake-S will only offer a maximum of eight cores in its largest configuration. Within the press release PDF, Intel stated that the current silicon as tested is rated for 125 W TDP, with a top turbo boost of 250 W, which matches what we see on the Core i9-10900K already. There’s no escaping the performance-per-watt characteristics of the process node, which indicates that Intel might find hitting those high frequencies a little easier with fewer cores to deal with. Intel is also promoting new overclocking tools with Rocket Lake, however did not go into details.

Another feature that Intel has disclosed with Rocket Lake is the move to PCIe Gen 4.0 on the processor, with up to 20 lanes available. These are likely to be split into one x16 for graphics and one x4 for storage on most motherboards, and this aligns with what we’ve seen on the latest generation of Intel Z490 motherboards, some of which have already promoted support for PCIe 4.0 ‘on future Intel processors’. This means Rocket Lake. Intel also mentions that the memory controller now supports up to DDR4-3200, however the projected performance numbers were done with DDR4-2933 memory.

On the graphics side, moving to the Xe-LP graphics architecture is going to be a big uplift in graphics performance, with Intel suggesting a 50% improvement over current Comet Lake integrated graphics. It is worth noting here in the slide that Intel mentions ‘UHD Graphics ft Xe Graphics Architecture’ – this would perhaps point to a scaled down version of Xe compared to Tiger Lake. I’m fully expecting to see only 32 EUs here, as a balance between die area, power, and performance. In the fine print it suggests that there will be some versions of Rocket Lake without the integrated graphics enabled, similar to the F processors we see on the market today.

That being said, for those units with integrated graphics, Intel is promoting new media encoders and display resolution support, with up to 4K60 12-bit for 4:4:4 HEVC and VP9, or up to 4K60 with 10-bit 4:2:0 AV1, showcasing AV1 support for mainstream processors. Display resolution support has also increased, with up to three 4K60 displays or two 5K60 displays, supporting DP 1.4a (with HBR3) and HDMI 2.0b.

This was an unexpected news announcement this morning - speaking to peers it all seems to be a bit of a surprise - perhaps even for the PR teams, given that the system configurations as 'projected' in the slide above is dated 6th August, almost 3 months ago. It will be interesting to hear if Intel will disclose more details ahead of launch.

Source: Intel

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  • Luminar - Thursday, October 29, 2020 - link

    FMA is superior. Reply
  • Klimax - Friday, October 30, 2020 - link

    Not true. There is AVX512F (aka foundation) that supports all original AVX512 instructions and masking at 512-bit width. It is always present. All other extensions can be checked and you still need fallback anyway for other CPUs. Reply
  • brucethemoose - Thursday, October 29, 2020 - link

    Its not a waste, but it would certainly be nice if the x86 players (or at the very least, Intel) standardized x86 SIMD like ARM is doing with SVE. Reply
  • whatthe123 - Thursday, October 29, 2020 - link

    I think the problem is that avx512 doesn't make sense anymore if they're shipping Xe gpus.

    Why put a fat clockspeed draining instruction on CPU when you have a GPU that is much likely considering faster and more efficient? Intel really needs to just admit there's no market on consumer devices for avx512 and dump it, preferably making use of the die space to improve their CPU ipc.
    Reply
  • npz - Friday, October 30, 2020 - link

    You can't port everything to run on gpu shaders. They're good for hyper parallel code and data. A large amount of multimedia and scientific code can't be broken up into hundreds parallel chunks. Intel and the x.264 dev tried but couldn't come to a consensus on getting x.264 to work on gpu. It can use OpenCL (or could, I don't know about nowadays ..) for marginal gain but that's it. However, it benefits HEAVILY from AVX. And in particular x.265 (for hevc) really likes AVX-512. Reply
  • KurtL - Friday, October 30, 2020 - link

    If you've ever done programming for GPUs you would know that there are cases where it makes perfect sense. There are cases that AVX512 can accelerate and a GPU can not because with a GPY you have a transfer of control between the CPU and GPU which costs time, and you need to transfer between two memory spaces. It is also a myth that AVX512 by itself is power hungry. This is not true at all. In fact, it is easier to execute CPU vector instructions than NVIDIA-style GPU instructions as the compiler does more of the work in AVX. It is the implementation in Skylake that was mediocre at best. This may or may not be corrected in the new core. Reply
  • whatthe123 - Saturday, October 31, 2020 - link

    It's not a myth, by default AVX512 implementations come with offsets because of its power draw, and all you need to do is run mixed ops to see the voltage falloff and stalls caused by AVX512. Reply
  • YB1064 - Thursday, October 29, 2020 - link

    Intel's naming scheme and product stack gives the USB consortium a serious run for its money. If you sift through all the bullsh!@#, this is just the same old wine in a new bottle. Reply
  • lmcd - Thursday, October 29, 2020 - link

    Incredibly idiotic that you're reposting the same comment year after year longer than Intel has been releasing the same product year after year. Did you not read the part where this is a new core? New graphics architecture? Improved memory controller? New video decoder/encoder?

    Not every release changes the world but Rocket Lake looks to be a solid release, the second best and Intel's best since Skylake.
    Reply
  • Flunk - Thursday, October 29, 2020 - link

    AVX-512 instructions target a very limited set of applications, unless you're using them the logic is just taking up space on the die. Probably not that much space, after all Intel is also shipping a iGPU on all CPUs, taking up a huge amount of space even if you don't need one. Reply

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