GlobalFoundries Weds FinFET and SOI in 14HP Process Tech for IBM z14 CPUsby Anton Shilov on September 22, 2017 7:00 AM EST
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GlobalFoundries this week formally introduced its new custom process technology that will be used to manufacture IBM's z14 CPUs, which in turn were announced earlier this year. The 14HP (14 nm, high performance) tech weds FinFET transistors and SOI substrates to get IBM the best of both worlds: small feature sizes and maximized clockspeed potential.
When IBM and GlobalFoundries agreed to transfer semiconductor manufacturing business of the former to the latter, IBM demanded GF to develop and offer custom fabrication processes for IBM’s server CPUs throughout 2014 to 2024 timeframe and involving multiple nodes. Initially the companies talked about custom 22 nm, 14 nm and 10 nm technologies, but in their final announcement they only mentioned a 10-year exclusive supply agreement without disclosing particular nodes. Therefore, it remains to be seen what GlobalFoundries, which is skipping the 10 nm node, is going to offer to its partner (a custom 7 nm is a natural guess). Earlier this year IBM announced its z14 processors for mainframes and this week GlobalFoundries disclosed details about the process technology used to make these chips.
Before we proceed to 14HP, let’s recap what is the IBM z14 and why the blue giant needed a custom technology to build it. The IBM Z mainframes are designed for 24/7/365 availability with zero downtime and are aimed at mission critical applications like credit card processing. IBM Z mainframes are based on specially designed IBM z-series CPUs, which are unique both in terms of microarchitecture, feature set and even physical layout. Each IBM Z14 blade features six CPUs (which IBM calls CPs) carrying processing cores and L2+L3 caches as well as a system control chip (which IBM calls SC) featuring a large L4 cache as well as various interconnects. Each IBM z14 SC CPU consists of 6.1 billion transistors, runs at 5.2 GHz and contains 10 cores with dedicated 6 MB L2 per core (2MB L2 for instructions, 4MB L2 for data) and 128 MB shared L3. Meanwhile, the system control (SC) chip consists of 9.7 billion transistors and features 672 MB of L4 and interconnects to ensure coherency between CPUs. Needless to say, that both CP and SC are extremely complex and benefit from manufacturing technologies with small feature sizes.
Being very complex and very fast, IBM’s CPUs for z-series mainframes were historically produced using custom fabrication processes that were architected to deliver maximum performance, manufacturing costs be damned. In fact, it was IBM whom first used SOI substrates to build its RS64-IV codenamed ‘Istar’ PowerPC-AS CPUs in 2000, which was then followed by AMD and others whom used SOI to build their own highly-successful processors. The use of SOI enables a tangible increase of CPU clock rates without a massive increase of power consumption, but a SOI wafer substrate costs more than a bulk substrate, so this is exactly what GlobalFoundries’14HP is about.
|Comparison of 14 nm Branded Process Technologies|
|Fin Pitch||?||?||?||?||42 nm|
|Gate Pitch||?||?||78 nm||90 nm||70 nm|
|Min Metal Pitch||?||?||64 nm||64 nm||52 nm|
|Gate Height||?||?||less than 480 nm||480 nm||399 nm|
GlobalFoundries says that the 14HP process technology leverages “the proven 14nm FinFET high-volume experience of our Fab 8 facility”, but does not explicitly say that 14HP is based on 14LPP; only that it uses SOI substrates instead of bulk ones. In fact, looking at the numbers it appears to be substantially different. When compared to GF’s 14LPP and similar bulk FinFET process technologies, 14HP can support up to 17 metal layers (vs. 13 for the 14LPP) and uses 12T libraries (vs. 9T and 7.5T for various 14 nodes). As for experience, 14HP will be utilized across the same ASML TWINSCAN NXT scanners that the company uses to produce existing chips using its current FinFET technologies.
GlobalFoundries is not disclosing too many specific details about 14HP, which isn't all that surprising given the situation at hand. There is a single customer that is going to use it, and IBM does not want to share too many details about how it designs its processors as well. So, while we do understand that SOI can help with increasing frequencies and voltages compared to bulk process technologies, we do not have precise numbers here.
- Hot Chips: IBM's Next Generation z14 CPU Mainframe Live Blog (5pm PT, 12am UTC)
- GlobalFoundries and AMD Announce First 14nm FinFET Sample Production Success
- GlobalFoundries Adds 12LP Process for Mainstream and Automotive Chips; AMD Planning 12LP CPUs & GPUs
- GlobalFoundries Details 7 nm Plans: Three Generations, 700 mm², HVM in 2018
- GlobalFoundries to Expand Capacities, Build a Fab in China
- GlobalFoundries Updates Roadmap: 7 nm in 2H 2018, EUV Sooner Than Later?
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MrSpadge - Friday, September 22, 2017 - link"The use of SOI enables a tangible increase of CPU clock rates without a massive increase of power consumption, but a SOI wafer substrate costs more than a bulk substrate"
As far as I understood so far, SOI mainly helps with substrate leakage. If you can get that under control in any other way, you're fine (Intels way). But if SOI allows tangible frequency increases, I wonder why it's not used more widely. The substrate cost is <300$ more than a bare Si wafer, but an entire processed wafer is approaching 10k$ in the leading edge nodes (or will get there at 7 nm). Perentage wise the cost of SOI substrates would dwarf the increased revenue from e.g. Ryzen or Vega being 10 - 20% faster due to higher clock speeds. If it was that simple the other foundries would follow that path, too.
BTW: should "Gate Height" in the table be "standard cell height"?
LuckyWhale - Friday, September 22, 2017 - linkIBM is surely a vertically integrated company. One one end they do advanced fundamental physical research and on the other end they make database servers and JVMs.
They put many low-level features in their hardware, that their software and upper layers utilize. Apple seems to be going the same way.
saratoga4 - Friday, September 22, 2017 - link>As far as I understood so far, SOI mainly helps with substrate leakage. If you can get that under control in any other way, you're fine (Intels way).
I was curious about this as well. You would think SOI would be less useful in a FinFET system since the channel is barely in contact with the substrate due to the Fin, but apparently there is still some scope for further leakage reduction:
SarahKerrigan - Friday, September 22, 2017 - linkThis is also the process that's going to be used for Power9, shipping later this year (and somewhat less exotic than z14.)
bill.rookard - Friday, September 22, 2017 - linkUm... 5.2ghz speeds designed for 24/7/365 operations? Intel and AMD could take some notes.
bubblyboo - Friday, September 22, 2017 - link5.2Ghz and 10 cores. I wonder if that's some sort of turbo speed though since having max speed running on all cores 24/7 sounds absurd.
DanNeely - Friday, September 22, 2017 - linkIf some prior IBM CPUs are an indication, stupidly high TDPs. Mainframes have been water cooled long before any of the cool kids started kludging things up with heater cores from a junk yard to overclock early pentiums even higher.
FunBunny2 - Friday, September 22, 2017 - link-- Mainframes have been water cooled long before any of the cool kids started kludging things up with heater cores from a junk yard to overclock early pentiums even higher.
Um. IBM mainframes were liquid cooled at least until 1990. they've been air cooled since.
edzieba - Friday, September 22, 2017 - linkZ14 only air-cools the SC (the 'chipset' equivalent). The CP's are all watercooled: https://www.anandtech.com/show/11750/hot-chips-ibm...
Alexvrb - Saturday, September 23, 2017 - linkHey now, a lot of people used NEW heater cores, thank you very much.